The SUPI4 protocol chip, presented by Phoenix Contact at SPS/IPC Drives
2008, is an implementation of the Interbus-IP core, which has enhanced
functionality in comparison to the previous protocol ASIC SUPI3.
In
customized applications, it is often required to directly integrate
this interface into the FPGA or ASIC. For cases such as these, MAZeT
offers interested customers the IPs and the implementation support. If
the customer so requests, then MAZeT can undertake the complete design
of the ASIC, FPGA or module – including production.
MAZeT has
many years of extensive experience in the implementation of Interbus
protocol-IPs. A modified version of the Interbus-IP has been also used
in non-industrial applications. One example is a safety-relevant
communication system to transfer voice traffic in which the modified
Interbus has proven itself to be successful for many years now.
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