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Package Type
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Your choices are...
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BGA
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Ball-grid array (BGA) places output pins in a solder ball matrix. Generally, BGA traces are fabricated on laminated (BT-based) substrates or polyimide-based films. Therefore, the entire area of substrates or films can be used to route the interconnection. BGA has another advantage of lower ground or power inductance by assigning ground or power nets via a shorter current path to PCB. Thermally enhanced mechanism (heat sink, thermal balls, etc.) can be applied to BGA to reduce the thermal resistance. The sophisticated capabilities make BGA the desirable package to implement electrical and thermal enhancement in response to the need for high power and high speed ICs.
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FCBGA
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Flip chip ball-grid array (FCBGA) uses a combination of flip chip and ball grid array features. FCBGA enables short electrical paths for high frequency applications. The simultaneous soldering of all joints in one pass through a reflow furnace facilitates the mounting of packages with thousands of solder joints.
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PBGA
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Plastic ball-grid array (PBGA) is the general terminology for the BGA package adopting plastic (epoxy molding compound) as the encapsulation. According to JEDEC standard, PBGA refers to an overall thickness of over 1.7mm.
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MCM-PBGA
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Multi-chip module plastic ball-grid array (MCM-PBGA).
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TBGA
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Tape ball-grid array (TBGA) uses a fine, polyimide substrate and provides good thermal performance with high pin counts.
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FLGA
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Fine-pitch land-grid array (FLGA) is extremely compact and lightweight, making it suitable for miniature disc drives and digital cameras.
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PGA
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Pin grid array (PGA) is a second-generation package that uses through-hole technology (THT). Pins are located on a 0.1" grid in various patterns. Package size is reduced by moving pins to the underside of the package in a grid pattern.
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IPGA
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Interstitial package grid array (IPGA) carries additional pins on a 0.5" offset pattern in between the pins of a regular PGA pattern. It almost doubles the available pins on the same package size as a standard PGA.
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CSP
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Chip scale package or chip size package (CSP) has an area that is no more than 20% larger than the built-in die. CSP is compact for second level packaging efficiency and encapsulated for second level reliability. CSP is superior to both direct-chip-attach (DCA) and chip-on-board (COB) technologies. CSP is used in a variety of integrated circuits (ICs), including radio frequency ICs (RFICs), memory ICs, and communication ICs.
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FCCSP
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Flip chip CSP (FCCSP).
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WLCSP
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Wafer-level chip-scale package (WLCSP) allows an IC to be attached facedown so that its pads connect to the printed circuit board (PCB) pads through individual solder balls without any underfill material. WLCSP minimizes IC-to-PCB inductance, features small package size, and provides enhanced thermal conduction.
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QFP
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Quad flat packages (QFP) contain a large number of fine, flexible, and gull wing shaped leads. Lead width can be as small as 0.16 mm. Lead pitch is 0.4 mm. QFPs provide good second-level reliability and are used in processors, controllers, ASICs, DSPs, gate arrays, logic, memory ICs, PC chipsets, and other applications.
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LQFP
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Low quad flat package (LFQP).
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TQFP
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Thin quad flat package (TQFP).
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QFN
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Quad flat non-leaded package (QFN). Also known as QFNL.
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SOP
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Small outline package (SOP).
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MLP
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The MLP (ultra-slim Micro Lead-rame Package) is a miniature package with a typical height of only 0.75 mm, length of 2 mm, and width of 3 mm.
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MSOP
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The MSOP (Mini Small Outline Plastic) package is smaller version of the SOP.
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SOIC
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Small outline integrated circuit (SOIC).
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SOJ
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Small outline J-lead (SOJ) is a common form of surface-mount DRAM packaging. It is a rectangular package with J-shaped leads on the two long sides of the device.
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TSOP Type I, Type II
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Thin small outline package (TSOP) is a type of DRAM package that uses gull wing shaped leads on both sides. TSOP DRAM mounts directly on the surface of the printed circuit board. The advantage of the TSOP package is that it is one-third the thickness of an SOJ package. TSOP components are commonly used in small outline DIMM and credit card memory applications. Thin small outline package may be Type I or Type II.
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SSOP
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Shrink small outline package (SSOP).
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TSSOP
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Thin shrink small outline L-leaded package (TSSOP).
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TDFN
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Fine Pitch, Dual-in-Line, Flat No-Lead (TDFN) is a high-performance replacement for 6-pin SOT-23 and SC-70, with improved thermal characteristics and reduced package parasitics. TDFN package is designed with a smaller footprint than SOT-23 packages, so it can save board space by up to 40% over comparable solutions. TDFN has an identical footprint as equivalent MLF and Mini-BGA packages.
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VSSOP
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Very thin shrink small outline package (VSSOP).
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TVSOP
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Thin very small outline package (TVSOP).
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HSOF
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Small outline flat-leaded package with heat sink (HSOF).
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PLCC
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Plastic leaded chip carrier (PLCC).
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LCCC
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Leadless ceramic chip carrier (LCCC).
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DIP
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Dual in-line package (DIP) is a type of DRAM component packaging. DIPs can be installed either in sockets or permanently soldered into holes extending into the surface of the printed circuit board.
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CDIP
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Ceramic dual in-line package (CDIP) consists of two pieces of dry pressed ceramic surrounding a "DIP formed" lead frame. The ceramic / LF / ceramic system is held together hermetically by frit glass reflowed at temperatures between 400° - 460° centigrade.
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PDIP
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Plastic dual in-line package (PDIP) is widely used for low cost, hand-insertion applications including consumer products, automotive devices, logic, memory ICs, micro-controllers, logic and power ICs, video controllers commercial electronics and telecommunications.
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SIP
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Single in-line package (SIP).
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SDIP
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Shrink dual in-line package (SDIP).
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SZIP
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Shrink zigzag in-line package (SZIP).
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SC-70
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SC-70 is one of the smallest available IC packages. It is used in cellular phones, PDAs, electronic games, laptops and other portable and hand-held applications where space is extremely limited.
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SOT-23
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Plastic surface mounted package.
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SOT-143
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SOT143 is a plastic, surface mounted, small outline transistor (SOT) package with four leads.
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TO-92
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The package uses a transistor outline (TO).
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Other
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Other unlisted, specialized, or proprietary packages.
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Search Logic:
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All products with ANY of the selected attributes will be returned as matches. Leaving all boxes unchecked will not limit the search criteria for this question; products with all attribute options will be returned as matches.
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Pin Count
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The number of pins in package.
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Search Logic:
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User may specify either, both, or neither of the "At Least" and "No More Than" values. Products returned as matches will meet all specified criteria.
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